/*
 * delta-ag9032v1 CPLD Platform Definitions
 *
 * Copyright (C) 2016, 2017 Cumulus Networks, Inc.  All Rights Reserved.
 * Author: Alan Liebthal (alanl@cumulusnetworks.com)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 */

#ifndef DELTA_AG9032V1_CPLD_H__
#define DELTA_AG9032V1_CPLD_H__

/* the DELTA-AG9032 actually has two CPLDs: cpu, and sw.
 * the CPLD driver has been coded such that we have the appearance of a
 * single CPLD. We do this by embedding a two-bit index for which CPLD
 * is to be accessed into each register definition. When the register is
 * accessed, the register definition is decoded into a CPLD index and
 * register offset.
 */
#define CPLD_IDX_SHIFT         (6)
#define CPU_CPLD_ID            (1)
#define SW_CPLD_ID             (2)
#define CPLD_IDX_MASK          (3 << CPLD_IDX_SHIFT)
#define CPU_CPLD_IDX           (CPU_CPLD_ID << CPLD_IDX_SHIFT)
#define SW_CPLD_IDX            (SW_CPLD_ID << CPLD_IDX_SHIFT)
#define NUM_CPLD_I2C_CLIENTS   (2)

#define GET_CPLD_IDX(A)        (((A & CPLD_IDX_MASK) >> CPLD_IDX_SHIFT) - 1)
#define STRIP_CPLD_IDX(A)      (A & ~CPLD_IDX_MASK)

/*
**  CPU CPLD registers
*/
#define DELTA_AG9032V1_CPULD_VERSION_REG                (0x01 | CPU_CPLD_IDX)

#define DELTA_AG9032V1_CPULD_BOARD_ID_REG               (0x02 | CPU_CPLD_IDX)
  #define DELTA_AG9032V1_BOARD_VER_MASK                 (0xf0)
  #define DELTA_AG9032V1_BOARD_ID_MASK                  (0x0f)

#define DELTA_AG9032V1_CPULD_MAIN_BOARD_TYPE_REG        (0x3 | CPU_CPLD_IDX)

#define DELTA_AG9032V1_CPULD_MAIN_BOARD_REV_REG         (0x04 | CPU_CPLD_IDX)

#define DELTA_AG9032V1_CPULD_FLASH_PROTECT_REG          (0x10 | CPU_CPLD_IDX)
  #define DELTA_AG9032V1_BOARD_EEPROM_PROTECT           (0x04)

/*
** SW CPLD registers
*/
#define DELTA_AG9032V1_SWPLD_BOARD_ID_REG               (0x00 | SW_CPLD_IDX)

#define DELTA_AG9032V1_SWPLD_VERSION_REG                (0x01 | SW_CPLD_IDX)

#define DELTA_AG9032V1_SWPLD_SWRESET_REG                (0x04 | SW_CPLD_IDX)
  #define DELTA_AG9032V1_RESET_BCM56960_L               BIT(6)

#define DELTA_AG9032V1_SWPLD_PWR_STATUS_REG             (0x08 | SW_CPLD_IDX)
  #define DELTA_AG9032V1_PWR1_PWR_OK                    BIT(7)
  #define DELTA_AG9032V1_PWR2_PWR_OK                    BIT(6)
  #define DELTA_AG9032V1_PWR1_HS_OK                     BIT(5)
  #define DELTA_AG9032V1_PWR2_HS_OK                     BIT(4)

#define DELTA_AG9032V1_SWPLD_SYS_LED_REG                (0x1c | SW_CPLD_IDX)
  #define DELTA_AG9032V1_PSU1_LED_MASK                  (0xc0)
  #define DELTA_AG9032V1_PSU1_LED_OFF                   (0x00)
  #define DELTA_AG9032V1_PSU1_LED_GREEN                 (0x40)
  #define DELTA_AG9032V1_PSU1_LED_AMBER_BLINK           (0x80)
  #define DELTA_AG9032V1_PSU2_LED_MASK                  (0x30)
  #define DELTA_AG9032V1_PSU2_LED_OFF                   (0x00)
  #define DELTA_AG9032V1_PSU2_LED_GREEN                 (0x10)
  #define DELTA_AG9032V1_PSU2_LED_AMBER_BLINK           (0x20)
  #define DELTA_AG9032V1_SYS_LED_MASK                   (0x0c)
  #define DELTA_AG9032V1_SYS_LED_OFF                    (0x00)
  #define DELTA_AG9032V1_SYS_LED_GREEN                  (0x04)
  #define DELTA_AG9032V1_SYS_LED_GREEN_BLINK            (0x08)
  #define DELTA_AG9032V1_SYS_LED_RED                    (0x0c)
  #define DELTA_AG9032V1_FAN_LED_MASK                   (0x03)
  #define DELTA_AG9032V1_FAN_LED_OFF                    (0x00)
  #define DELTA_AG9032V1_FAN_LED_GREEN                  (0x01)
  #define DELTA_AG9032V1_FAN_LED_AMBER                  (0x02)

#define DELTA_AG9032V1_SWPLD_FAN_TRAY1_4_LED_REG        (0x1d | SW_CPLD_IDX)
  #define DELTA_AG9032V1_FAN1_LED_MASK                  (0xc0)
  #define DELTA_AG9032V1_FAN1_LED_OFF                   (0x00)
  #define DELTA_AG9032V1_FAN1_LED_GREEN                 (0x40)
  #define DELTA_AG9032V1_FAN1_LED_RED                   (0x80)
  #define DELTA_AG9032V1_FAN2_LED_MASK                  (0x30)
  #define DELTA_AG9032V1_FAN2_LED_OFF                   (0x00)
  #define DELTA_AG9032V1_FAN2_LED_GREEN                 (0x10)
  #define DELTA_AG9032V1_FAN2_LED_RED                   (0x20)
  #define DELTA_AG9032V1_FAN3_LED_MASK                  (0x0c)
  #define DELTA_AG9032V1_FAN3_LED_OFF                   (0x00)
  #define DELTA_AG9032V1_FAN3_LED_GREEN                 (0x04)
  #define DELTA_AG9032V1_FAN3_LED_RED                   (0x08)
  #define DELTA_AG9032V1_FAN4_LED_MASK                  (0x03)
  #define DELTA_AG9032V1_FAN4_LED_OFF                   (0x00)
  #define DELTA_AG9032V1_FAN4_LED_GREEN                 (0x01)
  #define DELTA_AG9032V1_FAN4_LED_RED                   (0x02)

#define DELTA_AG9032V1_SWPLD_FAN_TRAY5_LED_REG          (0x1e | SW_CPLD_IDX)
  #define DELTA_AG9032V1_FAN5_LED_MASK                  (0xc0)
  #define DELTA_AG9032V1_FAN5_LED_OFF                   (0x00)
  #define DELTA_AG9032V1_FAN5_LED_GREEN                 (0x40)
  #define DELTA_AG9032V1_FAN5_LED_RED                   (0x80)

#define DELTA_AG9032V1_SWPLD_PSU_FAN_MUX_REG            (0x21 | SW_CPLD_IDX)
  #define DELTA_AG9032V1_PSU_MUX_MASK                   (0x30)
  #define DELTA_AG9032V1_PSU_MUX_SHIFT                  (4)
  #define DELTA_AG9032V1_FAN_MUX_MASK                   (0x0f)
  #define DELTA_AG9032V1_FAN_MUX_SHIFT                  (0)

#define DELTA_AG9032V1_SWPLD_QSFP_MUX_REG               (0x20 | SW_CPLD_IDX)
  #define DELTA_AG9032V1_QSFP_MUX_MASK                  (0xff)
  #define DELTA_AG9032V1_QSFP_MUX_SHIFT                 (0)

#define DELTA_AG9032V1_SWPLD_PWR_STATUS3                (0x0a | SW_CPLD_IDX)
  #define PSU1_PWR_GOOD                                 (0x80)
  #define PSU2_PWR_GOOD                                 (0x40)

#define DELTA_AG9032V1_SWPLD_MODSEL_1_8_REG             (0x30 | SW_CPLD_IDX)
#define DELTA_AG9032V1_SWPLD_MODSEL_9_16_REG            (0x31 | SW_CPLD_IDX)
#define DELTA_AG9032V1_SWPLD_MODSEL_17_24_REG           (0x32 | SW_CPLD_IDX)
#define DELTA_AG9032V1_SWPLD_MODSEL_25_32_REG           (0x33 | SW_CPLD_IDX)

#define DELTA_AG9032V1_SWPLD_LPMODE_1_8_REG             (0x34 | SW_CPLD_IDX)
#define DELTA_AG9032V1_SWPLD_LPMODE_9_16_REG            (0x35 | SW_CPLD_IDX)
#define DELTA_AG9032V1_SWPLD_LPMODE_17_24_REG           (0x36 | SW_CPLD_IDX)
#define DELTA_AG9032V1_SWPLD_LPMODE_25_32_REG           (0x37 | SW_CPLD_IDX)

#define DELTA_AG9032V1_SWPLD_PRES_1_8_REG               (0x38 | SW_CPLD_IDX)
#define DELTA_AG9032V1_SWPLD_PRES_9_16_REG              (0x39 | SW_CPLD_IDX)
#define DELTA_AG9032V1_SWPLD_PRES_17_24_REG             (0x3a | SW_CPLD_IDX)
#define DELTA_AG9032V1_SWPLD_PRES_25_32_REG             (0x3b | SW_CPLD_IDX)

#define DELTA_AG9032V1_SWPLD_RESET_1_8_REG              (0x3c | SW_CPLD_IDX)
#define DELTA_AG9032V1_SWPLD_RESET_9_16_REG             (0x3d | SW_CPLD_IDX)
#define DELTA_AG9032V1_SWPLD_RESET_17_24_REG            (0x3e | SW_CPLD_IDX)
#define DELTA_AG9032V1_SWPLD_RESET_25_32_REG            (0x3f | SW_CPLD_IDX)

#endif  /* DELTA_AG9032V1_CPLD_H__ */
